Chip development goes up a level or two

1999-11-23

Despite fears that Moore's law is running out of stem, recent semiconductor announcements suggest that there’s life in the old technology yet. First off, scientists at Berkley University, California, have developed a transistor that is four hundred times smaller than those currently available to chip designers. Second, the Semiconductor Industry Alliance (SIA) released its technology roadmap which indicated that future gains in scale would be based on integrating multiple silicon and packaging technologies on a single chip. Finally, last week IBM announced how, using developments in chip layering, it had developed transistors which stood vertically on the chip’s surface, rather than laying flat.

All these developments add up to the suggestion of a rosy future for integrated circuits. Given the fact that the Berkeley development will not be patented so to enable “the widest possible usage,” and the existence of the SIA as a cross-industry body of competing vendors, the future looks even brighter. Most significant is the coupling of the IBM announcement with the plans of the SIA, as together these suggest integration of many device types, including displays, processors and audio equipment, onto a multi-layered, multi-component, single chip foundation.

It is unclear how much potential for innovation still exists in silicon but these developments should keep the ball rolling for a good five years, by which time research in other areas (For example, nanotechnology or Hitachi’s memory chip research) should be starting to bear fruit. Again, integration is the key: by the time the new generation of devices starts to roll off the design station, they will be able to slot right into the connectivity and packaging developed for the older generations of integrated circuits.

(First published 23 November 1999)